Team:Paris/Modeling/f4DC
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(New page: Strain ΔflhDC and ΔfliA. We assume that the logical gate is a ''SUM'' (see our project), so that <center> f4(flhDC,fliA) = f4(flhDC,0) + f4(0,fliA) </center> [[...) |
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We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | ||
- | <center> f4( | + | <center> f4(FlhDC,FliA) = f4(FlhDC,0) + f4(0,FliA) </center> |
[[Image:f4DC.png]] | [[Image:f4DC.png]] |
Revision as of 01:29, 28 July 2008
Strain ΔflhDC and ΔfliA.
We assume that the logical gate is a SUM (see our project), so that