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Team:Paris/Modeling/f7DC
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(New page: Strain ΔflhDC and ΔfliA. We assume that the logical gate is a ''SUM'' (see our project), so that <center> f7(flhDC,fliA) = f7(flhDC,0) + f7(0,fliA) </center> [[...) |
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We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | ||
| - | <center> f7( | + | <center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center> |
[[Image:f7DC.png]] | [[Image:f7DC.png]] | ||
Revision as of 01:32, 28 July 2008
Strain ΔflhDC and ΔfliA.
We assume that the logical gate is a SUM (see our project), so that
