Team:Paris/Modeling/f4DC
From 2008.igem.org
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<center> f4(FlhDC,FliA) = f4(FlhDC,0) + f4(0,FliA) </center> | <center> f4(FlhDC,FliA) = f4(FlhDC,0) + f4(0,FliA) </center> | ||
- | [[Image: | + | [[Image:f4DCa.png]] |
Revision as of 16:25, 12 August 2008
Strain ΔflhDC and ΔfliA.
We assume that the logical gate is a SUM (see our project), so that