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Team:Paris/Modeling/f7A
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| - | Strain | + | Strain Δ''flhDC'' and Δ''fliA''. |
We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | We assume that the logical gate is a ''SUM'' (see [[Team:Paris/Project|our project]]), so that | ||
<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center> | <center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center> | ||
| - | [[Image: | + | [[Image:f7Ab.png]] |
Latest revision as of 15:32, 13 August 2008
Strain ΔflhDC and ΔfliA.
We assume that the logical gate is a SUM (see our project), so that
