Team:Paris/Modeling/f7DC

(Difference between revisions)

Latest revision as of 15:33, 13 August 2008

Strain ΔflhDC and ΔfliA.

We assume that the logical gate is a SUM (see our project), so that

f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA)

Revision as of 16:34, 12 August 2008 (view source) Hugo (Talk \| contribs) ← Older edit		Latest revision as of 15:33, 13 August 2008 (view source) Hugo (Talk \| contribs)
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	<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>		<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>

-	[[Image:~~f7DCa~~.png]]	+	[[Image:f7DCb.png]]