Team:Paris/Modeling/f8DC

From 2008.igem.org

(Difference between revisions)
 
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<center> f8(FlhDC,FliA) = f8(FlhDC,0) + f8(0,FliA) </center>
<center> f8(FlhDC,FliA) = f8(FlhDC,0) + f8(0,FliA) </center>
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[[Image:f8DCa.png]]
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[[Image:f8DCb.png]]

Latest revision as of 15:32, 13 August 2008

Strain ΔflhDC and ΔfliA.

We assume that the logical gate is a SUM (see our project), so that

f8(FlhDC,FliA) = f8(FlhDC,0) + f8(0,FliA)

F8DCb.png