Team:Paris/Modeling/f7DC

(Difference between revisions)

Revision as of 16:34, 12 August 2008

Strain ΔflhDC and ΔfliA.

We assume that the logical gate is a SUM (see our project), so that

f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA)

Revision as of 01:40, 28 July 2008 (view source) Hugo (Talk \| contribs) m ← Older edit		Revision as of 16:34, 12 August 2008 (view source) Hugo (Talk \| contribs) Newer edit →
Line 4:		Line 4:
	<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>		<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>

-	[[Image:~~f7DC~~.png]]	+	[[Image:f7DCa.png]]