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Team:Paris/Modeling/f4DC
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Revision as of 00:56, 28 July 2008 by
Hugo
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Strain ΔflhDC and ΔfliA.
We assume that the logical gate is a
SUM
(see
our project
), so that
f4(flhDC,fliA) = f4(flhDC,0) + f4(0,fliA)