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Team:Paris/Modeling/f7DC
From 2008.igem.org
Revision as of 01:40, 28 July 2008 by
Hugo
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Strain Δ
flhDC
and Δ
fliA
.
We assume that the logical gate is a
SUM
(see
our project
), so that
f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA)