Team:Paris/Modeling/f7DC

From 2008.igem.org

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<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>
<center> f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA) </center>
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[[Image:f7DC.png]]
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[[Image:f7DCa.png]]

Revision as of 16:34, 12 August 2008

Strain ΔflhDC and ΔfliA.

We assume that the logical gate is a SUM (see our project), so that

f7(FlhDC,FliA) = f7(FlhDC,0) + f7(0,FliA)

F7DCa.png