Team:UC Berkeley Tools/Team

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Dr. Douglas Densmore

Douglas Densmore

Douglas Densmore received his Bachelors of Science in Engineering (Computer Engineering) from the University of Michigan in April 2001. He received his Masters of Science in Electrical Engineering in May 2004 from the University of California at Berkeley. His masters thesis was entitled, "Platform Based Reconfigurable Architecture Exploration via Boolean Constraints" and demonstrated how Boolean Satisfiability could be used to produce configurations for programmable hardware. He received his PhD in Electrical Engineering from UC Berkeley as well in May 2007. His PhD thesis, entitled "A Design Flow for the Development, Characterization, and Refinement of System Level Architecture Services", explored how electronic system level design methodologies can be abstract and modular while at the same time remaining accurate and efficient.

He is currently a UC Chancellor's post doctoral researcher at UC Berkeley studying under Prof. Alberto Sangiovanni-Vincentelli. His research area is in the development of System Level Design methodologies for electronic systems. Specifically, architecture modeling and refinement verification. His background and interests are in Computer Architecture, Logic Synthesis, Digital Logic Design and Synthetic Biology.

His industry experience includes four+ summers with Intel Corporation where he was involved in pre-silicon design efforts regarding chipset development, post-silicon validation of the Pentium 4 microprocessor, and chipset software validation. He has also worked as a researcher at Cypress Semiconductor and Xilinx Research Labs. He is currently a member of the Gigascale Systems Research Center (GSRC) and the Center for Hybrid and Embedded Software Systems (CHESS) at UC Berkeley. He has published work regarding a method of successive refinement verification of electronic systems, taxonomies of EDA design tools, and algebraic frameworks for the manipulation of functional design descriptions to expose computational parallelism. In addition he has a US patent pending regarding data characterization of programmable devices (such as field programmable gate arrays).


Anne Van Devender

Anne Van Devender

Nade Sritanyaratana

Nade Sritanyaratana is a 3rd year undergraduate at the University of California, Berkeley. He is majoring in Bioengineering with a concentration in imaging, and hopes to apply for a PhD graduate program in the upcoming year. His prior research experience consists of working with bioengineering professor Steven Conolly in the Summer and Fall of 2007. Beyond imaging, his academic interests include biomechanics; signals and systems; circuit analysis; systems biology; and linear optimization.

Matthew Johnson

Who we are


Advisors:

  • Advisor 1: Doug Densmore, Post-Doctorate at UC Berkeley
  • Advisor 2: Chris Anderson, Assistant Professor at UC Berkeley


Undergrads:

  • Student: Anne Van Devender, 4th year Computer Science undergraduate
  • Student: Matthew Johnson, 4th year Bioengineering undergraduate, UC Berkeley
  • Student: Nade Sritanyaratana, 4th year Bioengineering undergraduate, UC Berkeley

What we did

(Provide proper attribution for all work)


Where we're from

(I honestly don't know what iGEM is expecting from this subpage, so here follows my perhaps superfluous rant about me.)

Nade is a 4th year bioengineering undergraduate at UC Berkeley. He was born in the SF Bay Area, here at Hayward, and has lived around the Bay Area his entire life. Sritanyaratana is a Thai surname with historic roots; a revered general was given the name by the ruling king of that era. Nade is also an ethnic name, suggested to his family by a Thai monk. He attended James Logan High School for four years in Union City, where his primary academic activities included speech and debate, Leo Club, and the swim team.